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Mr.N.Arumugam

narumugam's picture
Name: 
Mr.N.Arumugam
Earned Degree/Diploma: 
ME
Current Designation: 
Assistant Professor
Department: 
Computer Science and Engineering
Contact Phone Number: 
9791606345
Email (Official Preferred): 
narumugam91@gmail.com
Publications: 

Paper published

  1. Published a paper entitled ―250nm Technology Based Low Power SRAM Memory in IOSR Journal of VLSI and Signal Processing (IOSR-JVSP).Vol.5,Issue 1,Jan-Feb.2015
  2. Published a paper ―Design of Low power SRAM Memory using 9T SRAM cell in a special issue (conference INSA sponsored) of International Journal of Advanced and Innovative Research. Ref.No: IJAIR/14/03/11/01
  3. Submitted a paper ―Design of Low power SRAM Memory using 9T SRAM cell in IEEE Transaction on Very Large Scale Integration System.
Contributions: 

PROFESSIONAL ACTIVITIES

  1. Keynote Speaker for the one day Hands-on Training on “Implementation of VLSI Circuits using Tanner Tool” for M.E. (VLSI Design) students at Vivekanandha Colege of Engineering for Women, Tiruchengode on 29.03.2017.
  2. Conducted one day workshop on “Implementation of VLSI Circuits using Tanner Tool” for UG students at Vivekanandha Colege of Engineering for Women, Tiruchengode on 15.12.2018.
  3. Conducted and Co-ordinated the course on “Design on Low Power VLSI Circuits” for UG students at Government College of Engineering – Srirangam for a period of 30 days from August 1 to August 31, 2015.
  4. Organized a workshop for UG students entitled “Physical Design of VLSI Circuit using GTA Tools” at Government College of Engineering – Srirangam.
  5. Handled a session on “EC-6502 Principles of Digital Signal Processing” in the Faculty Development Programme at Government College of Engineering – Srirangam.
  6. Assisted the Nodal Office for the Anna University Examinations‖ for Thiruchirappalli Zone (Zone – XVIII) at Government College of Engineering – Srirangam

 

 

WORKSHOP ATTENDED

  1. Anna University Conducted INNOVAUTT to Participant ―Secure Communication using Public Key Infrastructure‖, at Tiruchirappalli on 27-01-2011 to 28-01-2011.
  2. Participated in the Two days National Level Technical workshop on ―Network Simulator-2” held at Tagore Institute of Engineering And Technology, Salem on 03-10-2013 and 04-10-2013.
  3. Participated in the Two-days workshop on ―MATLAB &VLSI Design” held at Adhiyamaan College of Engineering, Hosur.
  4. Participated in the Two-days workshop on ―VLSI Design Laboratory (Cadence Tool)” held at M.I.E.T. Engineering College, Trichy.